1. Field of the Invention
The present invention is in the field of motor controller. The present invention further relates to Hard Disk Drive and optical data storage devices. The present invention further relates to methods and circuits for controlling a voice coil motor for positioning the read/write head of a hard disk drive. The implementation is not limited to a specific technology, and applies to either the invention as an individual component or to inclusion of the present invention within larger systems which may be combined into a larger integrated circuit.
The invention also falls within the field of integrated circuits to drive a motor.
2. Brief Description of Related Art
The physical kinetic parameters of a motor such as velocity and acceleration are directly linked to its torque which, in its turn, is directly dependent on the current applied to the motor itself. That is why generally motors are driven in current by means of a control loop that senses the current in the motor and regulates it according to a desired value.
In several fields the accurate control of position, velocity and acceleration of a motor is critical to the overall performance of the system. Some of these fields are: the hard disk drive applications, the optical data storage motor positioning applications, the digital still camera applications to control focus, zoom and other dedicated motors, the printer applications, the robotics and others.
The position of the read/write head of a disk drive is typically controlled by a linear motor, often referred to as the Voice Coil Motor (VCM). The VCM 4, as shown in FIG. 1, is represented as an inductor L1 in series to a resistor R1 to indicate the main electrical parameters of the motor. The VCM is driven in response to a control loop, known as the servo loop, whose main algorithm is implemented typically within a microprocessor or similar digital processor, and is typically driven in at least three different modes.
A “seek” mode causes the read/write head to move from one track on the disk to a potentially unrelated track, which may require a significant motion. In this mode, the control system typically attempts to control the velocity of the mechanism. In “track follow” mode, the read/write head is relatively stationary, and the control system works to control its precise position to be directly above the appropriate track. In a third mode, the head is driven onto or off of the disk surface to a “park” position, typically using a mechanical ramp to pull the head above the surface of the disk.
As shown in FIG. 1, the VCM control system comprises a serial port 1 that communicates with the microprocessor that contains the main servo algorithm and that drives, with digital signals, a digital to analog converter (DAC) 2. This DAC 2 typically drives a VCM actuator 3 in its various forms and implementations. The VCM actuator 3 commands the current into the VCM 4 which defines its arm's velocity and position on the disk surface.
In addition to the servo loop there is, typically, an inner analog current control loop that drives the VCM as shown in more details in FIG. 1. The serial port 1 drives a Digital to Analog Converter (DAC) 2 which, in its turn, commands the current through the inner current control loop. In this case the VCM actuator block 3 comprises the inner analog current control loop to regulate the current into the VCM 4.
In order to obtain optimal control, the overall servo loop commands a particular current to be driven into the VCM, and an inner analog control loop regulates the current. Practical circuit implementation considerations require that the VCM be driven with conventional amplifiers which impose a voltage across the VCM. The local analog control loop senses the current in the VCM, compares it to the commanded current, and adjusts the drive voltage to maintain the desired current.
The inner analog control loop is driven by a DAC 2 creating an analog representation of the digitally commanded current, and a Current Sense Amplifier (CSA) 5 generates a signal representing the value of the VCM current. These two signals are summed at the input of the error amplifier 6, and this sum is the error in the value of the current.
The error amplifier 6 is conventionally an integrator, with arbitrarily high gain at DC but with gain falling with frequency to maintain the stability of the loop at higher frequencies. As is well known in the art, the passive components C1, C2 and R4 in FIG. 1 determine the bandwidth of the inner analog control loop. This stage might also implement additional frequency/phase shaping for stability. The output of error amplifier 6 feeds the VCM power amplifier 7, typically constituted of two anti-phase linear amplifiers, connected as a “full bridge” capable of applying the full supply voltage across the load in either polarity. In series with the VCM 4 there is a low value resistor R5 used to sense current. The differential voltage across this current sense resistor R5 is fed the differential input of the current sense amplifier 5. Schillaci et al. (U.S. Pat. No. 6,417,639) provided a slightly different but equivalent solution.
Within this loop, the error amplifier is a large bandwidth standard operational amplifier. The DC errors can be initialized out of the loop with software, during the so called “calibration phase” and the AC requirements are generally met with conventional design techniques. The VCM power amplifier 7 is similarly very conventional in design, and it is generally implemented using class AB or pseudo-class AB integrated amplifiers. Typical Class AB stages are implemented with complementary components biased with a stand-by current and feature very low zero-cross distortion.
Zero-cross distortion is an important parameter to measure the ability of the driver to exhibit zero current in the motor when zero current is desired. The so-called “jumps” or “dead-bands” in the transfer function of the amplifier are highly undesirable and typically minimized by the use of class AB stages. When the stages are biased in a similar manner using non-complementary components, as is often the case for the integrated motor driver circuits, they are generally known as pseudo-class AB amplifiers.
The two components of this analog loop that require precision analog design are the current sense amplifier and the DAC. The current sense amplifier's DC error may be calibrated out of the system through parameters in the overall digital control loop. But a large common mode error would be difficult to similarly calibrate out. As the VCM is driven through the extremes of its range, the small signal across the sense resistor also is moved common mode through the entire range. Any failure in the current sense amplifier to reject this common mode signal will result in false detection of VCM current.
The DAC is typically on the order of 12-15 bits, representing a total dynamic range of approximately 70-80 dB. This dynamic range is critical in order to be able to control both very large currents needed to sweep the head across the disk quickly and to control the head position without error over a very small final position (within the disk track). The design of conventional DACs (also known as Nyquist-rate DACs) with this resolution is well known in the art. Furthermore the DAC converts the digital signal representing the current into an analog voltage signal representing the current to be applied to the VCM.
The overall analog control system, including DAC, current sense amplifier, error amplifier and power amplifiers is typically implemented on a single chip, as in Kagami et al. (U.S. Pat. No. 6,678,109), usually along with the control and power stage for the disk drive spindle motor actuator and any other analog/power functions required in the chip. The resultant “combo chip” has a yield which is a product of the yield of all of the subsystems, so any subsystem which carries a risk of yield loss due to performance variations is of great concern in the analysis of system cost.
Carobolante (U.S. Pat. No. 5,297,024) describes an alternate control scheme for the Voice Coil Motor Driver utilizing a current sense resistor in series to the full bridge, a scheme to change the gain of the system by applying power to the motor with one pair of low side transistors or with a different pair of low side transistors and by controlling the gate voltage of the low side transistors with a feedback current control system. This approach, although interesting, does not guarantee a very good zero cross distortion as in the case of the conventional class AB power amplifiers.
It is well known in the art that the conventional DAC can be replaced with a current DAC which has, as an output, an analog current in place of a more traditional analog voltage.
It is also known, that in signal conversion fields, where high accuracy and signal dynamic are necessary, alternate “oversampling” converters and more specifically “one-bit” converters have significant advantage over simple PWM schemes as described in Sawtell et al. (U.S. Pat. No. 7,034,490).
In the Hard Disk Drive (HDD) systems the density of the magnetic data recorded on the disk is increasing very rapidly and that is translated in the number of rotational tracks per inch on the disk surface. The tracks containing the magnetic data are consequently getting narrower and the burden to stay on track with limited Bit Error Rate (BER) during normal operation, is shifted to the ability to control the position of the head on the disk with increasing accuracy.
It is therefore advantageous to reduce as much as possible the sources of electrical noise in the overall drive control loop so that the effective dynamic range is improved.
It is also advantageous to reduce or eliminate as much as possible the number of external components required for the operation of the motor actuation, possibly eliminating also the DC errors that make the calibration phase necessary before regular motor operation.
Nowadays several efforts are increasingly made to improve the overall efficiency of the motor drive especially for the case of battery operated disk drive or more generally motor drives. Class AB amplifiers, although featuring low overall distortion, are constantly biased at a non-negligible stand-by current.
There are also typically two contrasting requirements for a VCM drive system. The motor control has to be very accurate with minimum zero cross distortion in “track follow” operation, and efficient and speedy in “seek” mode. One possible solution to this problem is to define a system that operates in PWM (Pulse Width Modulation), switching the outputs at a given frequency, so as to drive the motor inductance with the bridge transistors either fully off or fully on when in “seek” mode, and that operates in linear mode when in “track follow”.
In PWM, the VCM motor may be driven in current mode, the most conventional means to control its torque, or in voltage mode leaving the task to control its acceleration, velocity, position to the outer servo loop that reads the position of the magnetic head off the disk tracks and commands the DAC accordingly. Both methods present their advantage and drawbacks.
Generally the Hard Disk Drive manufacturers are reluctant to drive the VCM motor in PWM because of the possible effects of the EMI (Electro-Magnetic Interferences) introduced by the output stage high frequency switching. This is particularly critical in “track follow”, when digital data are being read and written. Therefore it is advantageous to combine the accurate and noise-free linear drive of the motor in “track follow” with the efficient PWM driving in “seek” mode.
Moreover it is advantageous to improve on the bandwidth of the system in order to comply with an ever increasing requirement to drive the motor with faster control especially for the case of micro-drives that employ very small disks and VCM arms.
Accordingly, what is needed is a VCM actuator that is cost-effective, easier to implement, with faster response and with better performance in terms of dynamic range in order to improve the control of the VCM arm and, consequently, the control of the position of the read/write head on the disk.